implement conditional jumps

examples/48_ip_register.asm

@@ -0,0 +1,23 @@
+; ========================================================================
+;
+; (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved.
+;
+; This software is provided 'as-is', without any express or implied
+; warranty. In no event will the authors be held liable for any damages
+; arising from the use of this software.
+;
+; Please see https://computerenhance.com for further information
+;
+; ========================================================================
+
+; ========================================================================
+; LISTING 48
+; ========================================================================
+
+bits 16
+
+mov cx, 200
+mov bx, cx
+add cx, 1000
+mov bx, 2000
+sub cx, bx

examples/48_ip_register.txt

@@ -0,0 +1,12 @@
+--- test\listing_0048_ip_register execution ---
+mov cx, 200 ; cx:0x0->0xc8 ip:0x0->0x3
+mov bx, cx ; bx:0x0->0xc8 ip:0x3->0x5
+add cx, 1000 ; cx:0xc8->0x4b0 ip:0x5->0x9 flags:->A
+mov bx, 2000 ; bx:0xc8->0x7d0 ip:0x9->0xc
+sub cx, bx ; cx:0x4b0->0xfce0 ip:0xc->0xe flags:A->CS
+
+Final registers:
+      bx: 0x07d0 (2000)
+      cx: 0xfce0 (64736)
+      ip: 0x000e (14)
+   flags: CS

examples/49_conditional_jumps.asm

@@ -0,0 +1,24 @@
+; ========================================================================
+;
+; (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved.
+;
+; This software is provided 'as-is', without any express or implied
+; warranty. In no event will the authors be held liable for any damages
+; arising from the use of this software.
+;
+; Please see https://computerenhance.com for further information
+;
+; ========================================================================
+
+; ========================================================================
+; LISTING 49
+; ========================================================================
+
+bits 16
+
+mov cx, 3
+mov bx, 1000
+loop_start:
+add bx, 10
+sub cx, 1
+jnz loop_start

examples/49_conditional_jumps.txt

@@ -0,0 +1,17 @@
+--- test\listing_0049_conditional_jumps execution ---
+mov cx, 3 ; cx:0x0->0x3 ip:0x0->0x3
+mov bx, 1000 ; bx:0x0->0x3e8 ip:0x3->0x6
+add bx, 10 ; bx:0x3e8->0x3f2 ip:0x6->0x9 flags:->A
+sub cx, 1 ; cx:0x3->0x2 ip:0x9->0xc flags:A->
+jne $-6 ; ip:0xc->0x6
+add bx, 10 ; bx:0x3f2->0x3fc ip:0x6->0x9 flags:->P
+sub cx, 1 ; cx:0x2->0x1 ip:0x9->0xc flags:P->
+jne $-6 ; ip:0xc->0x6
+add bx, 10 ; bx:0x3fc->0x406 ip:0x6->0x9 flags:->PA
+sub cx, 1 ; cx:0x1->0x0 ip:0x9->0xc flags:PA->PZ
+jne $-6 ; ip:0xc->0xe
+
+Final registers:
+      bx: 0x0406 (1030)
+      ip: 0x000e (14)
+   flags: PZ

src/main.c

@@ -8,6 +8,7 @@
 #include "sim8086.h"
 
 #include "sim8086.c"
+#include "sim8086_memory.c"
 #include "sim8086_decoder.c"
 #include "sim8086_simulator.c"
 
@@ -86,39 +87,50 @@ err:
 int dissassemble(FILE *src, FILE *dst) {
     fprintf(dst, "bits 16\n\n");
 
+	struct memory mem = { 0 };
+	int byte_count = load_mem_from_stream(&mem, src, 0);
+	if (byte_count == -1) {
+		fprintf(stderr, "ERROR: Failed to load file to memory\n");
+		return -1;
+	}
+
     char buff[256];
     struct instruction inst;
-    int counter = 1;
-    while (true) {
-        enum decode_error err = decode_instruction(src, &inst);
+	u16 inst_address = 0;
+    while (inst_address < byte_count) {
+        enum decode_error err = decode_instruction(&mem, &inst_address, &inst);
         if (err == DECODE_ERR_EOF) break;
         if (err != DECODE_OK) {
-            fprintf(stderr, "ERROR: Failed to decode %d instruction: %s\n", counter, decode_error_to_str(err));
+            fprintf(stderr, "ERROR: Failed to decode instruction at 0x%08x: %s\n", inst_address, decode_error_to_str(err));
             return -1;
         }
 
         instruction_to_str(buff, sizeof(buff), &inst);
         fprintf(dst, buff);
         fprintf(dst, "\n");
-        counter += 1;
     }
 
     return 0;
 }
 
 int simulate(FILE *src) {
+	struct memory mem = { 0 };
+	int byte_count = load_mem_from_stream(&mem, src, 0);
+	if (byte_count == -1) {
+		fprintf(stderr, "ERROR: Failed to load file to memory\n");
+		return -1;
+	}
+
 	struct cpu_state state = { 0 };
     struct instruction inst;
-    int counter = 1;
-    while (true) {
-        enum decode_error err = decode_instruction(src, &inst);
+    while (state.ip < byte_count) {
+        enum decode_error err = decode_instruction(&mem, &state.ip, &inst);
         if (err == DECODE_ERR_EOF) break;
         if (err != DECODE_OK) {
-            fprintf(stderr, "ERROR: Failed to decode %d instruction: %s\n", counter, decode_error_to_str(err));
+            fprintf(stderr, "ERROR: Failed to decode instruction at 0x%08x: %s\n", state.ip, decode_error_to_str(err));
             return -1;
         }
 		execute_instruction(&state, &inst);
-        counter += 1;
     }
 
 	printf("Final registers:\n");
@@ -129,12 +141,13 @@ int simulate(FILE *src) {
 	printf("      bp: 0x%04x (%d)\n", state.bp, state.bp);
 	printf("      si: 0x%04x (%d)\n", state.si, state.si);
 	printf("      di: 0x%04x (%d)\n", state.di, state.di);
+	printf("      ip: 0x%04x (%d)\n", state.ip, state.ip);
 	printf("   flags: %s%s\n", state.flags.sign ? "S" : "", state.flags.zero ? "Z" : "");
 	return 0;
 }
 
 void print_usage(const char *program) {
-	fprintf(stderr, "Usage: %s <test-dump|dump|run> <file>\n", program);
+	fprintf(stderr, "Usage: %s <test-dump|dump|sim> <file>\n", program);
 }
 
 int test_decoder(const char *asm_file) {
@@ -257,7 +270,7 @@ int main(int argc, char **argv) {
 	} else if (strequal(argv[1], "dump")) {
 		return dump_decompilation(argv[2]);
 
-	} else if (strequal(argv[1], "run")) {
+	} else if (strequal(argv[1], "sim")) {
 		return run_simulation(argv[2]);
 
 	} else {

src/sim8086.h

@@ -11,7 +11,8 @@
 
 #define panic(...) fprintf(stderr, "PANIC(%s:%d): ", __FILE__, __LINE__); fprintf(stderr, __VA_ARGS__); abort()
 #define todo(...) fprintf(stderr, "TODO(%s:%d): ", __FILE__, __LINE__); fprintf(stderr, __VA_ARGS__); abort()
-#define ARRAY_LEN(arr) sizeof(arr) / sizeof(arr[0])
+#define ARRAY_LEN(arr) (sizeof(arr) / sizeof(arr[0]))
+#define MEMORY_SIZE 65536 // 2^16
 
 enum operation {
     OP_MOV,
@@ -101,6 +102,10 @@ struct instruction {
     i8 jmp_offset;
 };
 
+struct memory {
+    u8 mem[MEMORY_SIZE];
+};
+
 struct cpu_state {
     u16 ax;
     u16 bx;
@@ -116,4 +121,6 @@ struct cpu_state {
         bool sign;
         // TODO: Add all flags
     } flags;
+
+    u16 ip;
 };

src/sim8086_decoder.c

@@ -1,5 +1,3 @@
-#include <stdio.h>
-
 #define dbg(...) printf("; "); printf(__VA_ARGS__); printf("\n")
 
 // TODO: find a way to merge "to/from register" with "to/from accumulator" branches into a single code path
@@ -73,24 +71,31 @@ static enum mem_base decode_mem_base(u8 rm) {
 }
 
 // Table 4-10. R/M (Register/Memory) Field Encoding
-static void decode_reg_or_mem(struct reg_or_mem_value *value, FILE *src, u8 rm, u8 mod, bool wide) {
+static void decode_reg_or_mem(
+        struct reg_or_mem_value *value,
+        struct memory *mem,
+        u16 *addr,
+        u8 rm,
+        u8 mod,
+        bool wide
+    ) {
     if (mod == 0b11) { // Mod = 0b11, register
         value->is_reg = true;
         value->reg = decode_reg(rm, wide);
     } else if (mod == 0b10) { // Mod = 0b10, memory with i16 displacement
-        i16 displacement = fgetc(src) | (fgetc(src) << 8);
+        i16 displacement = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
         value->is_reg = false;
         value->mem.base = decode_mem_base(rm);
         value->mem.disp = displacement;
     } else if (mod == 0b01) { // Mod = 0b01, memory with i8 displacement
-        i8 displacement = fgetc(src);
+        i8 displacement = pull_byte_at(mem, addr);
         value->is_reg = false;
         value->mem.base = decode_mem_base(rm);
         value->mem.disp = extend_sign_bit(displacement);
     } else if (mod == 0b00) { // Mod = 0b00, memory no displacement (most of the time)
         value->is_reg = false;
         if (rm == 0b110) { // Direct address
-            u16 address = fgetc(src) | (fgetc(src) << 8);
+            u16 address = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
             value->mem.base = MEM_BASE_DIRECT_ADDRESS;
             value->mem.disp = address;
         } else {
@@ -102,9 +107,16 @@ static void decode_reg_or_mem(struct reg_or_mem_value *value, FILE *src, u8 rm,
     }
 }
 
-static void deocde_reg_or_mem_to_src(struct src_value *value, FILE *src, u8 rm, u8 mod, bool wide) {
+static void deocde_reg_or_mem_to_src(
+        struct src_value *value,
+        struct memory *mem,
+        u16 *addr,
+        u8 rm,
+        u8 mod,
+        bool wide
+    ) {
     struct reg_or_mem_value reg_or_mem;
-    decode_reg_or_mem(&reg_or_mem, src, rm, mod, wide);
+    decode_reg_or_mem(&reg_or_mem, mem, addr, rm, mod, wide);
     if (reg_or_mem.is_reg) {
         value->variant = SRC_VALUE_REG;
         value->reg = reg_or_mem.reg;
@@ -117,13 +129,12 @@ static void deocde_reg_or_mem_to_src(struct src_value *value, FILE *src, u8 rm,
 // TODO: change to readinf from a byte buffer
 // TODO: add handling for 'DECODE_ERR_MISSING_BYTES'
 // Handy reference: Table 4-12. 8086 Instruction Encoding
-enum decode_error decode_instruction(FILE *src, struct instruction *output) {
-    u8 byte1 = fgetc(src);
-    if (feof(src)) return DECODE_ERR_EOF;
+enum decode_error decode_instruction(struct memory *mem, u16 *addr, struct instruction *output) {
+    u8 byte1 = pull_byte_at(mem, addr);
 
     // MOVE: Register memory to/from register
     if ((byte1 & 0b11111100) == 0b10001000) {
-        u8 byte2 = fgetc(src);
+        u8 byte2 = pull_byte_at(mem, addr);
         bool wide = byte1 & 0b1;
         bool direction = (byte1 & 0b10) >> 1;
 
@@ -135,11 +146,11 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
         if (direction) {
             output->dest.is_reg = true;
             output->dest.reg = decode_reg(reg, wide);
-            deocde_reg_or_mem_to_src(&output->src, src, rm, mod, wide);
+            deocde_reg_or_mem_to_src(&output->src, mem, addr, rm, mod, wide);
         } else {
             output->src.variant = SRC_VALUE_REG;
             output->src.reg = decode_reg(reg, wide);
-            decode_reg_or_mem(&output->dest, src, rm, mod, wide);
+            decode_reg_or_mem(&output->dest, mem, addr, rm, mod, wide);
         }
 
     // MOVE: Immediate to register
@@ -153,29 +164,30 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
 
         if (wide) {
             output->src.variant = SRC_VALUE_IMMEDIATE16;
-            output->src.immediate = fgetc(src) | (fgetc(src) << 8);
+            output->src.immediate = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
         } else {
             output->src.variant = SRC_VALUE_IMMEDIATE8;
-            output->src.immediate = fgetc(src);
+            output->src.immediate = pull_byte_at(mem, addr);
         }
 
+
     // MOVE: Immediate to register/memory
     } else if ((byte1 & 0b11111110) == 0b11000110) {
-        u8 byte2 = fgetc(src);
+        u8 byte2 = pull_byte_at(mem, addr);
 
         bool wide = byte1 & 0b1;
         u8 mod = (byte2 & 0b11000000) >> 6;
         u8 rm  = byte2 & 0b00000111;
 
         output->op = OP_MOV;
-        decode_reg_or_mem(&output->dest, src, rm, mod, wide);
+        decode_reg_or_mem(&output->dest, mem, addr, rm, mod, wide);
 
         if (wide) {
             output->src.variant = SRC_VALUE_IMMEDIATE16;
-            output->src.immediate = fgetc(src) | (fgetc(src) << 8);
+            output->src.immediate = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
         } else {
             output->src.variant = SRC_VALUE_IMMEDIATE8;
-            output->src.immediate = fgetc(src);
+            output->src.immediate = pull_byte_at(mem, addr);
         }
 
     // MOVE: Memory to accumulator
@@ -188,9 +200,9 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
 
         bool wide = byte1 & 0b1;
         if (wide) {
-            output->src.mem.disp = fgetc(src) | (fgetc(src) << 8);
+            output->src.mem.disp = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
         } else {
-            output->src.mem.disp = fgetc(src);
+            output->src.mem.disp = pull_byte_at(mem, addr);
         }
 
     // MOVE: Accumulator to memory
@@ -204,9 +216,9 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
         output->dest.mem.base = MEM_BASE_DIRECT_ADDRESS;
 
         if (wide) {
-            output->dest.mem.disp = fgetc(src) | (fgetc(src) << 8);
+            output->dest.mem.disp = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
         } else {
-            output->dest.mem.disp = fgetc(src);
+            output->dest.mem.disp = pull_byte_at(mem, addr);
         }
 
     // ADD/SUB/CMP: Reg/memory with register to either
@@ -223,7 +235,7 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
         bool wide      =  byte1 & 0b01;
         bool direction = (byte1 & 0b10) >> 1;
 
-        u8 byte2 = fgetc(src);
+        u8 byte2 = pull_byte_at(mem, addr);
         u8 mod = (byte2 & 0b11000000) >> 6;
         u8 reg = (byte2 & 0b00111000) >> 3;
         u8 rm  =  byte2 & 0b00000111;
@@ -231,16 +243,16 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
         if (direction) {
             output->dest.is_reg = true;
             output->dest.reg = decode_reg(reg, wide);
-            deocde_reg_or_mem_to_src(&output->src, src, rm, mod, wide);
+            deocde_reg_or_mem_to_src(&output->src, mem, addr, rm, mod, wide);
         } else {
             output->src.variant = SRC_VALUE_REG;
             output->src.reg = decode_reg(reg, wide);
-            decode_reg_or_mem(&output->dest, src, rm, mod, wide);
+            decode_reg_or_mem(&output->dest, mem, addr, rm, mod, wide);
         }
 
     // ADD/SUB/CMP: immediate with register/memory
     } else if ((byte1 & 0b11111100) == 0b10000000) {
-        u8 byte2 = fgetc(src);
+        u8 byte2 = pull_byte_at(mem, addr);
         u8 variant = (byte2 & 0b00111000) >> 3;
 
         if (variant == 0b000) {
@@ -256,19 +268,19 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
         u8 mod = (byte2 & 0b11000000) >> 6;
         u8 rm  = byte2 & 0b00000111;
 
-        decode_reg_or_mem(&output->dest, src, rm, mod, wide);
+        decode_reg_or_mem(&output->dest, mem, addr, rm, mod, wide);
 
         if (wide) {
             output->src.variant = SRC_VALUE_IMMEDIATE16;
             if (sign_extend) {
-                output->src.immediate = fgetc(src);
+                output->src.immediate = pull_byte_at(mem, addr);
                 output->src.immediate = extend_sign_bit(output->src.immediate);
             } else {
-                output->src.immediate = fgetc(src) | (fgetc(src) << 8);
+                output->src.immediate = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
             }
         } else {
             output->src.variant = SRC_VALUE_IMMEDIATE8;
-            output->src.immediate = fgetc(src);
+            output->src.immediate = pull_byte_at(mem, addr);
         }
 
     // ADD/SUB/CMP: immediate with accumulator
@@ -289,22 +301,22 @@ enum decode_error decode_instruction(FILE *src, struct instruction *output) {
 
         if (wide) {
             output->src.variant = SRC_VALUE_IMMEDIATE16;
-            output->src.immediate = fgetc(src) | (fgetc(src) << 8);
+            output->src.immediate = pull_byte_at(mem, addr) | (pull_byte_at(mem, addr) << 8);
         } else {
             output->src.variant = SRC_VALUE_IMMEDIATE8;
-            output->src.immediate = fgetc(src);
+            output->src.immediate = pull_byte_at(mem, addr);
         }
 
     // Conditional jumps
     } else if ((byte1 & 0b11110000) == 0b01110000) {
-        i8 jmp_offset = fgetc(src);
+        i8 jmp_offset = pull_byte_at(mem, addr);
         u8 opcode = byte1 & 0b00001111;
         output->op = cond_jmp_lookup[opcode];
         output->jmp_offset = jmp_offset;
 
     // Conditional loop jumps
     } else if ((byte1 & 0b11111100) == 0b11100000) {
-        i8 jmp_offset = fgetc(src);
+        i8 jmp_offset = pull_byte_at(mem, addr);
         u8 opcode = byte1 & 0b00000011;
         output->op = cond_loop_jmp_lookup[opcode];
         output->jmp_offset = jmp_offset;

src/sim8086_memory.c

@@ -0,0 +1,36 @@
+#include <stdio.h>
+
+// TODO: add error codes
+
+int load_mem_from_stream(struct memory *mem, FILE *stream, u32 start) {
+    u32 offset = 0;
+    while (true) {
+        u8 byte = fgetc(stream);
+        if (feof(stream)) break;
+        if (start + offset >= MEMORY_SIZE) return -1;
+        mem->mem[start + offset] = byte;
+        offset++;
+    }
+    return offset;
+}
+
+int load_mem_from_file(struct memory *mem, const char *filename, u32 start) {
+    FILE *stream = fopen(filename, "rb");
+    if (stream == NULL) {
+        return -1;
+    }
+    int byte_count = load_mem_from_stream(mem, stream, start);
+    fclose(stream);
+    return byte_count;
+}
+
+// TODO: Make this error some kind of error, when reading past end
+u8 read_byte_at(struct memory *mem, u16 address) {
+    return mem->mem[address % MEMORY_SIZE];
+}
+
+u8 pull_byte_at(struct memory *mem, u16 *address) {
+    u8 byte = read_byte_at(mem, *address);
+    (*address)++;
+    return byte;
+}

src/sim8086_simulator.c

@@ -196,7 +196,14 @@ void execute_instruction(struct cpu_state *state, struct instruction *inst) {
         }
         break;
     }
-    default:
+    case OP_JNE: {
+        if (!state->flags.zero) {
+            i8 jmp_offset = inst->jmp_offset;
+            state->ip += jmp_offset;
+        }
+
+        break;
+    } default:
         todo("Unhandled instruction execution '%s'\n", operation_to_str(inst->op));
     }
 }