split decoding and printing instruction to file
This commit is contained in:
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44255973d2
commit
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424
src/asm.c
424
src/asm.c
@ -4,19 +4,56 @@
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#include <assert.h>
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#define u32 uint32_t
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#define i32 int32_t
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#define u16 uint16_t
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#define u8 uint8_t
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#define i16 int16_t
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#define u8 uint8_t
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#define i8 int8_t
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#define panic(...) fprintf(stderr, "ABORT(%s:%d): ", __FILE__, __LINE__); fprintf(stderr, __VA_ARGS__); abort()
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#define todo(...) fprintf(stderr, "TODO(%s:%d): ", __FILE__, __LINE__); fprintf(stderr, __VA_ARGS__); abort()
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#define dbg(...) printf("; "); printf(__VA_ARGS__); printf("\n")
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#define ARRAY_LEN(arr) sizeof(arr) / sizeof(arr[0])
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const char *wide_reg_names[8] = { "ax", "cx", "dx", "bx", "sp", "bp", "si", "di" };
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const char *non_wide_reg_names[8] = { "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" };
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enum decode_error {
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DECODE_OK,
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DECODE_ERR_EOF,
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DECODE_ERR_MISSING_BYTES
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};
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// eac - Effective address calculation
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const char *eac_names[8] = {
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enum operation {
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OP_MOVE,
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__OP_COUNT
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};
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const char *operation_str[__OP_COUNT] = {
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"mov"
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};
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// Order and place of these `enum reg_value` enums is IMPORTANT! Don't rearrange!
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enum reg_value {
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REG_AL, REG_CL, REG_DL, REG_BL, REG_AH, REG_CH, REG_DH, REG_BH,
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REG_AX, REG_CX, REG_DX, REG_BX, REG_SP, REG_BP, REG_SI, REG_DI,
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__REG_COUNT
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};
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const char *reg_value_str[__REG_COUNT] = {
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"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
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"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"
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};
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// Order and place of these `enum mem_base` enums is IMPORTANT! Don't rearrange!
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enum mem_base {
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MEM_BASE_BX_SI,
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MEM_BASE_BX_DI,
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MEM_BASE_BP_SI,
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MEM_BASE_BP_DI,
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MEM_BASE_SI,
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MEM_BASE_DI,
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MEM_BASE_BP,
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MEM_BASE_BX,
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MEM_BASE_DIRECT_ADDRESS,
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__MEM_BASE_COUNT
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};
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const char *mem_base_str[8] = {
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"bx + si",
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"bx + di",
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"bp + si",
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@ -27,132 +64,291 @@ const char *eac_names[8] = {
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"bx"
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};
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const char *lookup_reg_name(u8 idx, bool wide) {
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assert(0 <= idx && idx <= 7);
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if (wide) {
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return wide_reg_names[idx];
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struct mem_value {
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enum mem_base base;
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i16 disp;
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// IMPORTANT! Keep in mind that `disp` should be interpreted as `u16`, if `base == MEM_BASE_DIRECT_ADDRESS`
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};
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struct reg_or_mem_value {
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bool is_reg;
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union {
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enum reg_value reg;
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struct mem_value mem;
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};
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};
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enum src_value_variant {
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SRC_VALUE_REG,
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SRC_VALUE_MEM,
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SRC_VALUE_IMMIDIATE8,
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SRC_VALUE_IMMIDIATE16
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};
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struct src_value {
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enum src_value_variant variant;
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union {
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enum reg_value reg;
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struct mem_value mem;
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u16 immidiate;
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};
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};
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struct instruction {
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enum operation op;
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struct reg_or_mem_value dest;
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struct src_value src;
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};
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static const char *reg_to_str(enum reg_value reg) {
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assert(0 <= reg && reg <= __REG_COUNT);
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return reg_value_str[reg];
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}
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static void mem_to_str(char *buff, size_t max_size, struct mem_value *mem) {
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assert(0 <= mem->base && mem->base <= __MEM_BASE_COUNT);
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if (mem->base == MEM_BASE_DIRECT_ADDRESS) {
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snprintf(buff, max_size, "[%d]", (u16)mem->disp);
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} else if (mem->disp > 0) {
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snprintf(buff, max_size, "[%s + %d]", mem_base_str[mem->base], mem->disp);
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} else if (mem->disp < 0) {
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snprintf(buff, max_size, "[%s - %d]", mem_base_str[mem->base], -mem->disp);
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} else {
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return non_wide_reg_names[idx];
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snprintf(buff, max_size, "[%s]", mem_base_str[mem->base]);
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}
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}
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void snprintf_mod_with_disp(char *rm_name, size_t size, u8 rm, i16 displacement) {
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if (displacement < 0) {
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snprintf(rm_name, size, "[%s - %d]", eac_names[rm], -displacement);
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static void reg_or_mem_to_str(char *buff, size_t max_size, struct reg_or_mem_value *value) {
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if (value->is_reg) {
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strncpy(buff, reg_to_str(value->reg), max_size);
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} else {
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snprintf(rm_name, size, "[%s + %d]", eac_names[rm], displacement);
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mem_to_str(buff, max_size, &value->mem);
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}
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}
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void get_rm_name(char *rm_name, size_t size, FILE *src, u8 rm, u8 mod, bool wide) {
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if (mod == 0b11000000) { // Mod = 0b11
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strcpy(rm_name, lookup_reg_name(rm, wide));
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} else if (mod == 0b10000000) { // Mod = 0b10
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i16 displacement = fgetc(src) | (fgetc(src) << 8);
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snprintf_mod_with_disp(rm_name, size, rm, displacement);
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} else if (mod == 0b01000000) { // Mod = 0b01
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i16 displacement = fgetc(src);
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if (displacement & 0b10000000) {
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displacement |= (0b11111111 << 8);
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}
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snprintf_mod_with_disp(rm_name, size, rm, displacement);
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} else if (mod == 0b00000000) { // Mod = 0b00
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if (rm == 0b110) { // Direct address
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u16 displacement = fgetc(src) | (fgetc(src) << 8);
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snprintf(rm_name, size, "[%d]", displacement);
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static void src_to_str(char *buff, size_t max_size, struct src_value *value) {
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switch (value->variant)
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{
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case SRC_VALUE_REG:
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strncpy(buff, reg_to_str(value->reg), max_size);
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break;
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case SRC_VALUE_MEM:
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mem_to_str(buff, max_size, &value->mem);
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break;
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case SRC_VALUE_IMMIDIATE16:
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snprintf(buff, max_size, "%d", value->immidiate);
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break;
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case SRC_VALUE_IMMIDIATE8:
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snprintf(buff, max_size, "%d", (u8)value->immidiate);
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break;
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}
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}
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static const char *operation_to_str(enum operation op) {
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assert(0 <= op && op <= __OP_COUNT);
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return operation_str[op];
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}
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static void instruction_to_str(char *buff, size_t max_size, struct instruction *inst) {
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switch (inst->op)
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{
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case OP_MOVE: {
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char dest[24];
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char src[24];
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reg_or_mem_to_str(dest, sizeof(dest), &inst->dest);
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src_to_str(src, sizeof(src), &inst->src);
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bool is_dest_mem = !inst->dest.is_reg;
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if (is_dest_mem && inst->src.variant == SRC_VALUE_IMMIDIATE16) {
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snprintf(buff, max_size, "mov %s, word %s", dest, src);
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} else if (is_dest_mem && inst->src.variant == SRC_VALUE_IMMIDIATE8) {
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snprintf(buff, max_size, "mov %s, byte %s", dest, src);
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} else {
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snprintf(rm_name, size, "[%s]", eac_names[rm]);
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snprintf(buff, max_size, "mov %s, %s", dest, src);
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}
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break;
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}
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default:
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panic("Invalid instruction opcode %d\n", inst->op);
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}
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}
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static i16 extend_sign_bit(i8 number) {
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if (number & 0b10000000) {
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return number | (0b11111111 << 8);
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} else {
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return number;
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}
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}
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// This function assumes that the `enum reg_value` values are in a convenient order, for conversion.
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// Look at "Table 4-9. REG (Register) Field Encoding" for more details
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static enum reg_value decode_reg(u8 reg, bool wide) {
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return reg + (u8)(wide) * 8;
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}
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// This function assumes that the `enum mem_base` values are in a convenient order, for conversion.
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// Look at "Table 4-10. R/M (Register/Memory) Field Encoding" for more details
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static enum mem_base decode_mem_base(u8 rm) {
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return rm;
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}
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// Table 4-10. R/M (Register/Memory) Field Encoding
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static void decode_reg_or_mem(struct reg_or_mem_value *value, FILE *src, u8 rm, u8 mod, bool wide) {
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if (mod == 0b11000000) { // Mod = 0b11, register
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value->is_reg = true;
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value->reg = decode_reg(rm, wide);
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} else if (mod == 0b10000000) { // Mod = 0b10, memory with i16 displacement
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i16 displacement = fgetc(src) | (fgetc(src) << 8);
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value->is_reg = false;
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value->mem.base = decode_mem_base(rm);
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value->mem.disp = displacement;
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} else if (mod == 0b01000000) { // Mod = 0b01, memory with i8 displacement
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i8 displacement = fgetc(src);
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value->is_reg = false;
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value->mem.base = decode_mem_base(rm);
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value->mem.disp = extend_sign_bit(displacement);
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} else if (mod == 0b00000000) { // Mod = 0b00, memory no displacement (most of the time)
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value->is_reg = false;
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if (rm == 0b110) { // Direct address
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u16 address = fgetc(src) | (fgetc(src) << 8);
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value->mem.base = MEM_BASE_DIRECT_ADDRESS;
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value->mem.disp = address;
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} else {
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value->mem.base = decode_mem_base(rm);
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value->mem.disp = 0;
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}
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} else {
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panic("unknown 'mod' value: %d\n", mod);
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}
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}
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static void deocde_reg_or_mem_to_src(struct src_value *value, FILE *src, u8 rm, u8 mod, bool wide) {
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struct reg_or_mem_value reg_or_mem;
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decode_reg_or_mem(®_or_mem, src, rm, mod, wide);
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if (reg_or_mem.is_reg) {
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value->variant = SRC_VALUE_REG;
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value->reg = reg_or_mem.reg;
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} else {
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value->variant = SRC_VALUE_MEM;
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value->mem = reg_or_mem.mem;
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}
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}
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// TODO: add handling for 'DECODE_ERR_MISSING_BYTES'
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// Handy reference: Table 4-12. 8086 Instruction Encoding
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enum decode_error decode_instruction(FILE *src, struct instruction *output) {
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u8 byte1 = fgetc(src);
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if (feof(src)) return DECODE_ERR_EOF;
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output->op = OP_MOVE;
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// Register memory to/from register
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if ((byte1 & 0b11111100) == 0b10001000) {
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u8 byte2 = fgetc(src);
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bool wide = byte1 & 0b1;
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bool direction = (byte1 & 0b10) >> 1;
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u8 mod = byte2 & 0b11000000;
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u8 reg = (byte2 & 0b00111000) >> 3;
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u8 rm = byte2 & 0b00000111;
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if (direction) {
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output->dest.is_reg = true;
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output->dest.reg = decode_reg(reg, wide);
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deocde_reg_or_mem_to_src(&output->src, src, rm, mod, wide);
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} else {
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output->src.variant = SRC_VALUE_REG;
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output->src.reg = decode_reg(reg, wide);
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decode_reg_or_mem(&output->dest, src, rm, mod, wide);
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}
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// Immediate to register
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} else if ((byte1 & 0b11110000) == 0b10110000) {
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bool wide = (byte1 & 0b1000) >> 3;
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u8 reg = byte1 & 0b111;
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output->dest.is_reg = true;
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output->dest.reg = decode_reg(reg, wide);
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if (wide) {
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output->src.variant = SRC_VALUE_IMMIDIATE16;
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output->src.immidiate = fgetc(src) | (fgetc(src) << 8);
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} else {
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output->src.variant = SRC_VALUE_IMMIDIATE8;
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output->src.immidiate = fgetc(src);
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}
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// Immediate to register/memory
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} else if ((byte1 & 0b11111110) == 0b11000110) {
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u8 byte2 = fgetc(src);
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bool wide = byte1 & 0b1;
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u8 mod = byte2 & 0b11000000;
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u8 rm = byte2 & 0b00000111;
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decode_reg_or_mem(&output->dest, src, rm, mod, wide);
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if (wide) {
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output->src.variant = SRC_VALUE_IMMIDIATE16;
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output->src.immidiate = fgetc(src) | (fgetc(src) << 8);
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} else {
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output->src.variant = SRC_VALUE_IMMIDIATE8;
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output->src.immidiate = fgetc(src);
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}
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// Memory to accumulator
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} else if ((byte1 & 0b11111110) == 0b10100000) {
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bool wide = byte1 & 0b1;
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output->dest.is_reg = true;
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output->dest.reg = REG_AX;
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output->src.variant = SRC_VALUE_MEM;
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output->src.mem.base = MEM_BASE_DIRECT_ADDRESS;
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if (wide) {
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output->src.mem.disp = fgetc(src) | (fgetc(src) << 8);
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} else {
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output->src.mem.disp = fgetc(src);
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}
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// Accumulator to memory
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} else if ((byte1 & 0b11111110) == 0b10100010) {
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bool wide = byte1 & 0b1;
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output->src.variant = SRC_VALUE_REG;
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output->src.reg = REG_AX;
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output->dest.is_reg = false;
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output->dest.mem.base = MEM_BASE_DIRECT_ADDRESS;
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if (wide) {
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output->dest.mem.disp = fgetc(src) | (fgetc(src) << 8);
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} else {
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output->dest.mem.disp = fgetc(src);
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}
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} else {
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todo("unhandled byte %d", byte1);
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}
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return DECODE_OK;
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}
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void dissassemble(FILE *src, FILE *dst) {
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fprintf(dst, "bits 16\n\n");
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char line[256];
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struct instruction inst;
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while (true) {
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u8 byte1 = fgetc(src);
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if (feof(src)) break;
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// Register memory to/from register
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if ((byte1 & 0b11111100) == 0b10001000) {
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u8 byte2 = fgetc(src);
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bool wide = byte1 & 0b1;
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bool direction = (byte1 & 0b10) >> 1;
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u8 mod = byte2 & 0b11000000;
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u8 reg = (byte2 & 0b00111000) >> 3;
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u8 rm = byte2 & 0b00000111;
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const char *reg_name = lookup_reg_name(reg, wide);
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char rm_name[24] = { 0 };
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get_rm_name(rm_name, sizeof(rm_name), src, rm, mod, wide);
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if (direction) {
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fprintf(dst, "mov %s, %s\n", reg_name, rm_name);
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} else {
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fprintf(dst, "mov %s, %s\n", rm_name, reg_name);
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}
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// Immediate to register
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} else if ((byte1 & 0b11110000) == 0b10110000) {
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bool wide = (byte1 & 0b1000) >> 3;
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u8 reg = byte1 & 0b111;
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u16 immediate;
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if (wide) {
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immediate = fgetc(src) | (fgetc(src) << 8);
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} else {
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immediate = fgetc(src);
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}
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fprintf(dst, "mov %s, %d\n", lookup_reg_name(reg, wide), immediate);
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// Immediate to memory
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} else if ((byte1 & 0b11111110) == 0b11000110) {
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u8 byte2 = fgetc(src);
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bool wide = byte1 & 0b1;
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u8 mod = byte2 & 0b11000000;
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u8 rm = byte2 & 0b00000111;
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char rm_name[24] = { 0 };
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get_rm_name(rm_name, sizeof(rm_name), src, rm, mod, wide);
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u16 immediate;
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if (wide) {
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immediate = fgetc(src) | (fgetc(src) << 8);
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fprintf(dst, "mov %s, word %d\n", rm_name, immediate);
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} else {
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immediate = fgetc(src);
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fprintf(dst, "mov %s, byte %d\n", rm_name, immediate);
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}
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// Memory to accumulator
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} else if ((byte1 & 0b11111110) == 0b10100000) {
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bool wide = byte1 & 0b1;
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u16 immediate;
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if (wide) {
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immediate = fgetc(src) | (fgetc(src) << 8);
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} else {
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immediate = fgetc(src);
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}
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fprintf(dst, "mov ax, [%d]\n", immediate);
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|
||||
// Accumulator to memory
|
||||
} else if ((byte1 & 0b11111110) == 0b10100010) {
|
||||
bool wide = byte1 & 0b1;
|
||||
|
||||
u16 immediate;
|
||||
if (wide) {
|
||||
immediate = fgetc(src) | (fgetc(src) << 8);
|
||||
} else {
|
||||
immediate = fgetc(src);
|
||||
}
|
||||
|
||||
fprintf(dst, "mov [%d], ax\n", immediate);
|
||||
|
||||
} else {
|
||||
todo("unhandled byte %d", byte1);
|
||||
enum decode_error err = decode_instruction(src, &inst);
|
||||
if (err == DECODE_ERR_EOF) break;
|
||||
if (err != DECODE_OK) {
|
||||
fprintf(stderr, "ERROR: Failed to decode instruction, code: %d\n", err);
|
||||
break;
|
||||
}
|
||||
|
||||
instruction_to_str(line, sizeof(line), &inst);
|
||||
fprintf(dst, line);
|
||||
fprintf(dst, "\n");
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user